The present invention relates to a data processing system such as a digital computer. More particularly, the invention relates to a microinstruction controlled data processing system.
In conventional digital computers, the macroinstruction to be executed next is read out from a memory in which macroinstructions and data are stored, and an address for specifying data to be used for the execution of this macroinstruction is determined by an instruction unit. Based on this data address, corresponding data is read out from the above-mentioned memory and the macroinstruction is executed by an operation unit. The data read out from the memory at one time has a predetermined length, for example, a length of 8 bytes. Read-out of data from the memory is not performed on data of bytes starting from an optional address position, but read-out is performed on data of a length of 8 bytes from the boundary position between two blocks, each including 8 bytes. Accordingly, when data to be read out is located on both sides of this boundary position, even if the length of the desired data is shorter than 8 bytes, the read-out operation is conducted twice. More specifically, 8 bytes having an address smaller than the boundary position and 8 bytes having an address larger than the boundary position are read out, respectively. Positioning of the 8-byte data is performed by using an arithmetic unit so that the desired 8-byte data can be picked out from these two groups of 8-byte data. Since positioning of data and pick-up of data are performed by using an arithmetic unit, a long processing time is necessary. Accordingly, the instruction processing time is prolonged. Data processing systems in which positioning and pick-up of data are performed exclusively by a wired logic circuit (hereinafter referred to as "data converter") so as to eliminate the above-mentioned defect are proposed in the following literature references:
1. Specification of U.S. Pat. No. 3,858,183 PA0 2. Japanese Patent Application Laid-Open Specification No. 94133/78
In the former data processing system, data of 8 bytes including desired data of 4 bytes is read out from a memory, positioning of the read-out 8-byte data is performed by a data converter, and the desired data of 4 bytes is then picked up. In the latter data processing system, positioning of data of 16 bytes including desired data of up to 8 bytes is performed by using a data converter, and the desired data of a length of up to 8 bytes is picked up.
If positioning and pick-up of optional data are performed by using the data converter, the instruction processing time can be shortened. However, since it is necessary to perform positioning and pick-up of data while various instructions are being executed, the control circuit for the converter should inevitably be complicated. Moreover, the timing and procedures for performing positioning and pick-up of data differ depending on the respective instruction. Accordingly, the control circuit should be arranged so that the desired operation should be performed at a predetermined timing for each instruction while it is executed, and hence, the structure of the converter will inevitably be drastically complicated.